The present invention relates to a phase locked loop (PLL) control circuit and, more particularly, to a PLL control circuit used for a digital recording/reproducing device for converting an information signal to a digital signal so as to magnetically or optically record it on a data recording medium such as a tape or disk and reproduce it therefrom.
A pulse code modulation (PCM) system which converts an analog signal such as an audio signal to a digital signal has been recently developed due to the high quality of reproduction signals. For recording an audio signal in accordance with the PCM system, an analog signal is sampled, quantified, and coded to generate a binary signal which is then recorded on data recording medium such as an optical disk. At this time, after being encoded on the basis of error correction technique, the signal is modulated by the eight to fourteen modulation (EFM) system, for example.
A conventional PLL control circuit used with a PCM digital reproducing device such as a digital audio disk (DAD) system, the PLL control operation is performed on the basis of detection of only the phase component of a reproduction signal picked up from the digital audio disk (DAD). However, such PLL control operation may not work well since the frequency of a sync clock pulse signal produced by a voltage-controlled oscillator (VCO) may often become abnormal even if the conventional PLL control circuit is correctly phase-locked. As a result, in the conventional PLL control circuit, the capture range of the VCO is narrowed, so that an undesirably large hysteresis is formed between the capture range and the locking range.